| | SIPLUS S7-400 CPU 412-2 PN -25 ... +70 DEGREES C WITH CONFORMAL COATING BASED ON 6ES7412-2EK06-0AB0 . CENTRAL PROCESSING UNIT WITH: 1 MB WORKING MEMORY, (0,5 MB CODE, 0,5 MB DATA), INTERFACES: 1. IF MPI/DP 12 MBIT/S (X1), 2. IF ETHERNET/PROFINET (X5), |
| |
| General information |
| Hardware product version | 01 |
| Firmware version | V6.0 |
| Engineering with |
| Programming package | STEP7 V5.5 or higher/iMap V3.0 + iMap STEP7 Add-on V3.0 SP5 or higher |
| CiR - Configuration in RUN |
| CiR synchronization time, basic load | 100 ms |
| CiR synchronization time, time per I/O slave | 30 µs; Time per I/O byte |
| Supply voltage |
| 24 V DC | No; Power supply via system power supply |
| Input current |
| from CPU, max. | Not relevant for 400 series (300 series set) |
| from backplane bus 5 V DC, typ. | 1.1 A |
| from backplane bus 5 V DC, max. | 1.3 A |
| from backplane bus 24 V DC, max. | 150 mA; 150 mA per DP interface |
| from interface 5 V DC, max. | 90 mA; At the DP interface |
| Power losses |
| Power loss, typ. | 5.5 W |
| Power loss, max. | 6.5 W |
| Backup battery |
| Battery operation | Not relevant |
| Backup current, typ. | 125 µA; (up to 40 °C) |
| Backup current, max. | 450 µA |
| Backup time, max. | Dealt with in the module data manual with the secondary conditions and the factors of influence |
| Feeding of external backup voltage to CPU | 5 to 15 VDC |
| Feeding of external backup voltage to CPU | 5 to 15 VDC |
| Memory |
| Work memory |
| integrated | 1 Mbyte |
| integrated (for program) | 0.5 Mbyte |
| integrated (for data) | 0.5 Mbyte |
| expandable | No |
| Load memory |
| expandable FEPROM | Yes; with Memory Card (FLASH) |
| expandable FEPROM, max. | 64 Mbyte |
| integrated RAM, max. | 512 kbyte |
| expandable RAM | Yes; with Memory Card (RAM) |
| expandable RAM, max. | 64 Mbyte |
| Backup |
| present | Yes |
| with battery | Yes; all data |
| without battery | No |
| CPU processing times |
| for bit operations, min. | 75 ns |
| for word operations, min. | 75 ns |
| for fixed point arithmetic, min. | 75 ns |
| for floating point arithmetic, min. | 225 ns |
| CPU-blocks |
| DB |
| Number, max. | 3000; Number range: 1 to 16000 |
| Size, max. | 64 kbyte |
| FB |
| Number, max. | 1500; Number range: 0 to 7999 |
| Size, max. | 64 kbyte |
| FC |
| Number, max. | 1500; Number range: 0 to 7999 |
| Size, max. | 64 kbyte |
| OB |
| Number, max. | see instruction list |
| Size, max. | 64 kbyte |
| Number of free cycle OBs | 1; OB 1 |
| Number of time alarm OBs | 2; OB 10, 11 |
| Number of delay alarm OBs | 2; OB 20, 21 |
| Number of time interrupt OBs | 2; OB 32, 35 (shortest cycle that can be set = 500 µs) |
| Number of process alarm OBs | 2; OB 40, 41 |
| Number of DPV1 alarm OBs | 3; OB 55-57 |
| Number isochronous mode OBs | 2; OB 61-62 |
| Number of multicomputing OBs | 1; OB 60 |
| Number of background OBs | 1; OB 90 |
| Number of startup OBs | 3; OB 100-102 |
| Number of asynchronous error OBs | 9; OB 80-88 |
| Number of synchronous error OBs | 2; OB 121, 122 |
| Nesting depth |
| per priority class | 24 |
| additional within an error OB | 1 |
| Counters, timers and their retentivity |
| S7 counter |
| Number | 2048 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 2047 |
| preset | Z 0 to Z 7 |
| Counting range |
| lower limit | 0 |
| upper limit | 999 |
| IEC counter |
| present | Yes |
| Type | SFB |
| Number | Unlimited (limited only by RAM capacity) |
| S7 times |
| Number | 2048 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 2047 |
| preset | No times retentive |
| Time range |
| lower limit | 10 ms |
| upper limit | 9990 s |
| IEC timer |
| present | Yes |
| Type | SFB |
| Number | Unlimited (limited only by RAM capacity) |
| Data areas and their retentivity |
| retentive data area, total | Total working and load memory (with backup battery) |
| Flag |
| Number, max. | 4 kbyte; Size of bit memory address area |
| Retentivity available | Yes |
| Retentivity preset |
|
